As a Staff ASIC Digital Design Engineer, you will:
Independent Contribution and Mentorship: Act as an independent contributor while also mentoring others within the Design Ware Processor team.
Ownership and Accountability: Take full responsibility for the quality of delivery for one or more blocks of design functions within a product development effort. This includes authorship of plans and specs, guiding and coaching team members, and tracking technical work execution.
Technical Work: Engage in architecture, micro-architecture, performance analysis, logic design, verification, and validation operations. You will also be involved in related engineering flows or environments and necessary signoff delivery processes.
Collaboration: Collaborate with cross-team or cross-site colleagues on technical matters such as algorithms, methodologies, quality of delivery, So C prototyping, system bring-up, and other engineering tasks required for overall business operations.
Optimization and Debugging: Investigate, create, implement, analyze, debug, and optimize design functions as needed.
Job Requirements
Educational Background: A Master’s degree in Electrical Engineering (EE) or Computer Science (CS) from a reputed college is required.
Experience: Between 4 to 9 years of experience in digital front-end design or verification for IP business.
Technical Knowledge:
Comprehensive understanding of microprocessor architecture, memory architecture, and system architecture.
Hands-on experience in architecture, micro-architecture, RTL design, functional and performance modeling, performance profiling, performance analysis, or simulation verification based on UVM.
Programming Skills: Proficiency in System Verilog, System Verilog Assertion, Verilog, C/C++, assembly, Perl, Python, or shell scripts.
Tools: Experience with RTL linters, simulators, synthesizers, functional formal tools, functional coverage tools, and team collaboration tools such as continuous integration, source control management, issue tracking, and ADL-based generation tools like Synopsys ASIP Designer.
Multi-site Development: Experience with multi-site development is helpful.
Communication Skills:
Ability to create, modify, and review documentation such as design or verification work plans, engineering quality processes, test scenarios, and test reports.
Proficient in presenting and persuading on engineering works and solutions.
Ability to follow disciplines for issue tracking and changes.
Analytical Skills:
Capability to analyze signoff requirements for product releases.
Ability to evaluate Qo R and verification results for major milestone reviews.
Soft Skills:
Self-motivated team player with leadership qualities.
Ability to thrive in a fast-paced engineering environment.
Ability to motivate and influence team members toward achieving desired results is a plus.
Why This Role Might Be Right for You
Independent and Leadership Opportunities: If you have a strong background in digital design and verification and are looking to take on more responsibility, this role allows you to be an independent contributor while also mentoring others.
Technical Challenge: The role involves working on advanced processor IP products, providing a stimulating and challenging work environment.
Collaboration: You will have the opportunity to work with a diverse team of experts across different sites, enhancing your professional network and experience.
Innovation: Join a company that is at the forefront of technological innovation, contributing to the development of products that drive advancements in various fields.
Company Overview Synopsys is a global leader in silicon IP and software security, playing a pivotal role in the development of technologies that drive innovations like AI, 5G, Io T, and self-driving cars. The company emphasizes inclusion and diversity, ensuring a welcoming environment for all employees. If you have a passion for digital design and verification, and possess the necessary qualifications and experience, this role at Synopsys could be a perfect match for your career aspirations.