October 15, 2024

Synopsys

Porto Salvo

Analog & Mixed Signal Layout Manager

In this role, you will be responsible for resource and project planning, coordination of geographically distributed analog layout teams, and for the quality assurance of layout implementations.
This role will involve close interaction and collaborative teamwork with multiple functional groups (front end, analog, ASIC, CAD) and the product teams globally. The ideal candidate will be an excellent communicator and comfortable managing multiple tasks.

You will be part of an advanced physical design team developing full custom analog and ASIC layout of high-speed integrated circuits. As an Analog&Mixed-Signal Layout Manager you will be exposed to Ser Des PHY design for PCIe, Ethernet and other protocols. Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.
Ideal background would include hands-on analog layout or ASIC physical design experience with project management background and aptitude.

Main Responsibilities:

Assures high quality of Analog & Mixed-Signal Layout implementations
Owns cross team planning, collaboration, and coordination ensuring that geographically distributed teams are well-aligned
Measure project and performance using appropriate systems, tools and techniques
Establish and maintain relationships with cross-functional teams, internal and external customers
Create and maintain comprehensive project documentation

Key Qualifications:

Deep understanding of physical design of analog and mixed signal CMOS circuits
Excellent communication skills, ability to think and communicate at different levels of abstraction, with peer groups as well as customers
Solid organizational skills including attention to detail and multi-tasking skills
Autonomous, timely decision maker and able to cope with interrupts
Experience with advanced Fin FET nodes, TSMC 16 nanometer and below
Experience with Design tool(s): Custom Compiler, Cadence Virtuoso or equivalent
Verification tools: ICV, Calibre
Strong working knowledge of MS Office Suite of applications

Preferred Experience

MSEE or BSEE with a minimum of 8 years of related experience
Exposure to SERDES design architectures, and layout
Solid understanding of digital / mixed signal flows and SOC integration challenges
Experience in working with Jira/Atlassian (or other such) tools

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.