July 30, 2024

Allegro MicroSystems, LLC

新竹市

OTHER

Principal Device R&D Engineer

The Allegro team is passionate about providing intelligent solutions that move the world toward a safer and more sustainable future. With more than 30 years of experience developing advanced semiconductor technology, innovation with purpose touches every aspect of our business. From customer engagement and employee recognition to technology advancement and serving the local communities in which we maintain offices, innovation consistently drives our mission and definition of success.

SUMMARY

As a Senior/Principal Device Engineer you will be responsible for developing and supporting Allegro’s Bi CMOS, BCD and High Voltage technologies. You will be part of the Wafer Technology R&D team, you will work with Allegro internal engineering teams and interface with external manufacturing partners to develop innovative semiconductor devices and process technologies, support mature products and new product introduction, design new devices, define PDK design rules, and improve product yield and quality.

WHAT YOU'LL DO

Design active/passive/ESD/sensor devices for new semiconductor process technologies.
Develop new BCD - Sensor process integration flows to meet product requirements.
Define component design rules for new process technologies and devices.
Debug product yield issues with DE/PE/Foundry teams, identify root cause, drive implementation of corrective actions with Fab.
Define process and layout DOE and interface with process development team to execute fab experiments.
Work with EDA team to develop and maintain component libraries; define and maintain technology-specific design rules and guidelines.
Characterize devices using bench measurements, semiconductor analyzers, TLP testers.
Work with product designers to understand device requirements and provide guidance on implementation of devices in particular circuit designs; perform design reviews.
Organize technical projects and deliver objectives.

ESSENTIAL REQUIREMENTS

The successful candidate will have a minimum of MS in Electrical Engineering, Circuit Design or Device Physics with Ph D strongly preferred. The individual will have 7+ years of experience in Device Engineering, Process Integration, Device Yield Enhancement, Circuit design, Product Engineering.
The candidate must also possess the following:
- Advanced understanding of semiconductor device physics.
- Strong background in analog circuit design, direct design experience is a plus.
- Knowledge and experience in process flow integration for Bi CMOS/BCD technologies.
- Solid understanding and experience in setting up manufacturing design rules.
- Familiarity with Cadence EDA tools for layouts. TCAD experience is a plus.
- Excellent communication skills, ability to work both individually and as part of a team in different time zones.