Job Opportunities in Israel

What will your job look like:

• Leading FC timing activities & methodologies for brand New So C, from definition to TO.
• Writing design constraints (SDC) for FC/IP/Block levels for all modes.
• Involved in chip architecture definition for functional & DFT domains.
• Working in close collaboration with the front-end & architecture team.
• Working with engineers to identify and overcome roadblocks and obstacles.
• Defining AC timing from spec to implementation.
• Supporting complex clock structures.

All you need is:

• BSc/MSc in Electrical Engineering/Computer Science.
• STA Expert (Prime-Time/Signoff).
• 8 years of experience in VLSI backend (RTL2GDS).
• 5 years of experience in full chip STA on complex So Cs.
• Expert knowledge in timing closure & signoff methodologies.
• Experience with DFT architecture, Async timing concepts & verification.
• Experience in technically leading complex backend activities, preferably of complete So C's.
• Expert knowledge of the entire backend design flow from RTL to TO. (Synthesis, FP, Pn R , CTS , STA, EM/IR, Chip Integration, high-frequency designs).