Job Opportunities in Taiwan


May 31, 2024

聯發科技

新竹市


(資深) 繪圖處理器設計與驗證工程師

Job opportunity to recruit GPU/x PU digital designer who response for GPU hardware development and verification including micro-architecture joint development, both top and unit level RTL design/verification, and performance/area/power/memory bandwidth optimization. 1. Development and verification of scalable GPU HW modules - Fixed Function pipeline, Unified Shader, Rexture unit, HW tessellation, Ray Tracing,units, Load/Store unit, L1/L2/L3 cahces and coherency, etc. 2. Co-work with micro-architecture experts to plan and define GPU HW-SW framework - runtime, compiler, driver, debugger and profiler, etc. 3. Development of GPU top/unit level modules constraint random design verification enviroement with systemverilog/UVM verificaiton methodology. 4. Implement GPU IP verification environment to support tests regression and automaic flow include drivers and run-time model checkers.
1. Familiar with GPU, CPU, DSP, NPU, or and grphics/compute programmable hardware micro-architecture or design. Or 2. Familiar with graphics/compute programming with Open GL ES, Vulkan, or Direct X. Or 3. Familiar with memory subsystem micro-architecture or design including AMBA, No C, cache and load/store unit implementations, or etc. Or 4. Mastery of computer architecture and organization. Familiar with different micro-architecture and design selections of techniques and methodologies to implement the most efficient logic curcuit. 5. Strong skills in RTL implementation and verification based on proposed micro-architecture specification. 6. Familiar with implemenation flow including simulation, synthesis, performance tuning, timing and power analysis. 7. Excellent communication skills, responsibility and accountability, integraty and honesty. 8. MS/Ph D degree in CS/EE or relative field with 2 or more (for senior) years of RTL design and verification direct experience.

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