Job Opportunities in Switzerland

Job description

Student Project/Internship (6 months)

Proof of Concept for JTAG driven DFT implementation

Project Description

Current DFT (scan) implementation requires several external control pins that can be difficult to allocate in low pin count implementation. The addition of MBIST to the test mode introduce even more requirement for additional control pins to control test mode in an efficient way without using CPU core to handle this.
The goal of this internship is to test implementation of register controlled test mode management using a JTAG interface to write in the test registers. Define multiple test modes via JTAG and verify mode selection in simulations. Although JTAG introduces extra pins, but most of the designs contains a JTAG interface that can also be used for DFT test modes.
The project will be divided in the following steps:

Profile

We offer:

• An exciting work environment where you will be sitting side-by-side and interacting with our DFT and Implementation expert within the So C initiative team
• Working in a multinational team with great atmosphere
• A place where your internship matters and will live on after you leave

Internship Period is foreseen from: 1st February - 31st July 2025

Professional requirements

What you should bring along:

• Student in Electrical Engineering or Microelectronic system design with basic knowledge of semiconductor and digital design
• DFT basic knowledge is a plus

Languages

• English is must
• French is an advantage